A bus is an interconnection method and hardware by means of which a number of electronic modules may communicate. External controlling logic in combination with bus logic in each module typically handles the problem of a plurality of modules using the same bus. External controlling logic is often required since there can be several masters which desire to transfer data on the bus, but only one may use a data path at a time. The external controlling logic may be a part of a special module such as a central processing unit of a computer but this has a tremendous drawback in that there can be only one of this type of module in a system. Data lines for connecting modules are typically required as well as additional control signal lines to facilitate sharing of the bus resource between masters. It is an object of the invention to keep the number of control lines at a minimum for economy.
The frequency and direction of bus transfers tend to become random since there may be many master modules operating independently thereby complicating servicing of equipment and development of new modules. It is a further object of the invention to make the bus synchronous in that signals change only at well defined times. This is in contrast to asynchronous operation wherein bus settling times are determined by, for example, delay gates in the module logic. Such delays often prove in practice to be an unreliable and variable delay source. A further disadvantage with asynchronous logic is that it cannot be single stepped through its operations as can synchronous logic. Synchronous logic has an additional advantage over asynchronous logic in that it is less sensitive to noise impulses.
It is a further object of the invention to ensure that signals switch in unison and have until a next clock pulse or a selected time interval to settle down so that the bus is essentially in a static state by the time signals are sampled and that circuitry operate on levels rather than edges.
Three wires, a plurality of master units each having a sequencer and a plurality of logic gates perform necessary switching at well defined times to give any master unit control of the bus. Three lines pass control of the bus from one unit to another. The system requires no external controlling logic thereby simplifying operations and eliminating a need for a special purpose bus controller, system controller, or central processing unit.